Electrical Engineer with a strong background in embedded applications, communications, real-time programming, and firmware development.
Wind River Linux Development training.
Xilinx FPGA training (Verilog).
Xilinx FPGA training (VHDL).
Comprehensive VHDL Mentor Graphics training course.
Airborne Radar I & II, Brevard Community College.
M.S.T.M.. Embry-Riddle Aeronautical University.
B.S.E. Electrical Engineering, University of Central Florida.
Professional Engineer Intern Exam, Passed Oct. 1984.
Clearances: Top Secret/SBI July 1989, Secret November 1997, Top Secret October 2005
High level:
Basic
C/C++
FORTRAN
HTML/XHTML
Java
Server Side CGI
Perl / PHP / Lua / Java Script
PL/M
UML
Verilog
VHDL
Assembly (microprocessors):
Arm Cortex M3, A8
Intel 8085, 8051, and 80x86
Microchip PIC32, PIC24
Mips 74kc
Motorola 6805, 68HC11, 68040, and 88100 RISC
NEC 7500 and 7556
Power PC 440,74xx
Reneasas H8
Zilog Z8
Linux
Open VMS
UNIX
LynxOS
OS-X
Virtuoso
Mercury OS
pSOS
VxWorks
MS-DOS
Solaris
Windows
Digital Microcontroller Design
Storage Applications
Low Power Applications
FPGA HDL Development
Telephone Interface
Networking
Intrinsic Safety
USB, SATA, Fibre Channel, SCSI Interfaces
Duties and Activities:
Tasks and Accomplishments:
Linux kernel programming for an ARM-based SCADA radio communiations and control device.
Tasks and Accomplishments:
Programming embedded processors in smart encrypted radio WAN applications.
Tasks and Accomplishments:
Tasks and Accomplishments:
Position terminated due to sequestration schedule changes.
Programmed PIC and H8 embedded System Management Controllers (SMC)
supporting Intel i7s on ruggedized PC architectures. Real-time work
was performed using UML code generation with object oriented design
architecture.
Tasks and Accomplishments:
Contract programming for DRS Technologies for a prototype handheld Android Accessory
communication device. Real-time embedded programming performed in C for a Microchip
PIC 32-bit microcontroller.
Tasks and Accomplishments:
Responsible for product architecture and software development for storage
product line. These ranged from a 14 TB ruggedized system to a 3-module
320GB device used to read logging modules collected from field systems.
Programming performed in C, HTML, and server side CGI scripting in an embedded
Linux environment. Programming in Verilog and C for Xilinx Virtex 5 FPGAs.
Duties included:
Activities included:
Tasks and accomplishments include:
RAMICS Program
Developed a high speed data recorder and injector (playback) for data being produced at 60 MB/s per channel on fiber optic Serial Front Panel Data Port (SFPDP) lines. RAMICS is a Navy program consisting of a LIDAR controlled weapon system on a helicopter for clearing mines in shallow water. Real time code developed in C for an embedded Linux system with user interface control code developed in C++ compiling for Windows and Linux using the QT libraries.
AIMS Program
Development of a 2-channel high speed RADAR video recorder for data being produced on Gigabit Ethernet. This was targeted for the Air Force Global Hawk program interfacing with the MP-RTIP sensor. This worked in conjunction with the AIMS data publishing, subscribing, and querying architecture. Real-time code on Linux platforms developed in C. Control code on Windows platform in C++.
COBRA Program
Selected to fix a high speed data recording application for the Navy’s COBRA program. COBRA is an airborne multi-spectral mine detection system. This involved working with several sub-contractors at the device driver and system/application level. Work included kernel/device driver programming on an embedded Linux RAID system with a SCSI interface and application level programming with Windows XP. Data rates of 196 MB/s were realized on the Linux RAID device and an overall sustained system throughput of greater than 70 MB/s was achieved by the application.
ALMDS LRIP Program
Developed a 4-channel high speed recorder and injector (playback) for data being produced at 100 MB/s per channel on fiber optic Serial Front Panel Data Port (SFPDP) lines. Real time code was developed in C for an embedded Linux system with user interface control code developed in C++ compiling for Windows and Linux using the QT libraries. Control interface included a near real-time display of video data during flight. I flew as mission support specialist on Navy aircraft (SH60) during testing. Recorders functioned flawlessly during flight tests recording several terabytes of data. Injectors used extensively in support of primary application development.Developed a 4-channel high speed recorder and injector (playback) for data being produced at 100 MB/s per channel on fiber optic Serial Front Panel Data Port (SFPDP) lines. Real time code was developed in C for an embedded Linux system with user interface control code developed in C++ compiling for Windows and Linux using the QT libraries. Control interface included a near real-time display of video data during flight. I flew as mission support specialist on Navy aircraft (SH60) during testing. Recorders functioned flawlessly during flight tests recording several terabytes of data. Injectors used extensively in support of primary application development.
ALMDS LRIP Program
Led a team rehosting the ALMDS APS for the Low Rate Initial Production (LRIP) upgrade. The ALMDS LRIP APS consists of a large Class IV laser and 4 cameras with 10 Power PC (PPC) CPUs and 10 Virtex IV Pro FPGAs for the image recognition/data processing. All processing is done in a real-time environment with VxWorks. Duties included estimation and development of software portion of bidding process for the LRIP program. This program was nominated to Aviation Week and Space Technology Magazine’s Program of the Year. It was also nominated to EE Times 2006 Ace Awards Design Team of the Year competition.
ALMDS EMD Program
Led software team in implementation and development of embedded DSP and control software for the Airborne Laser Mine Detection System (ALMDS) APS. This consists of Sharc-based DSP parallel processing running in a Wind River Virtuoso real-time environment performing digital laser image processing. The ALMDS EMD APS consists of a large Class IV laser and 4 cameras with 48 Sharc CPUs for the data processor. All processing is done in a real-time environment. 67% of existing code base (35,000 lines) was modified. Only 202 lines of code were modified in 5 ½ months of flight testing. Flight testing was successful and Northrop Grumman secured the contract for low rate initial production (LRIP).
CWIN Program
Lead software development for an embedded control application integrating a Crestron video controller and Extron 64x64 video switch matrix with a local area network interface application and several high definition frame grabbers. Programming with Microsoft Visual Studio.
JCP Program
Lead software development for Navy Joint Stars Connectivity Package. This program exploits Joint Stars satellite data using an ARC/231 satcom radio and a Sun workstation. Tasks include identifying an appropriate synchronous serial interface, porting/writing a serial device driver for a Digi Sync 570i synchronous interface card, porting a MIL STD 188-184 DAMA Link Layer protocol library, and porting proprietary application layer communications software to a Sun Workstation.
ALMDS Program
Assisted in implementing a high speed data recorder and developed a real-time injector (playback) for the Airborne Laser Mine Detection System. The recorder and injector platforms were on a Mercury Vantage Race++ PCI system with a SCSI mass storage array connected via a proprietary fiber optic link to the Laser pod. The fiber optic link used a reconfigurable field gate array (FPGA) as an interface. The success of this work was a direct result my involvement in the Northrop Grumman HPC IR&D program.
HPC Program
Lead Northrop Grumman High Performance Computing IR&D program. This involves development of portable parallel processing algorithms for image recognition using MPI. Three platforms -- CSPI BOS (w/Myrinet communications), Mercury Race++, and Linux Beowulf (PPC G4) clusters were used. In addition, a major effort was made to assess various FPGA development technologies for reconfigurable computing applications. This concentrated on using reconfigurable FPGA-based fiber optic I/O cards for high speed data transfer and preliminary digital signal processing. This technology fed the parallel processing algorithms.
Satcom Program
Developed architecture and system software for Joint Stars SATCOM satellite communications enhancement program. This involved implementation of a proprietary application layer protocol on top of a MIL STD 188-184 DAMA Link Layer protocol. The application involves transfer of several military protocol messages (J-TIDS and TADIL-J) and NITFS formatted graphics files. Performed development and modifications to the Joint Stars RASP parallel processing DSP platform and the Joint Stars application software to enhance (double) the resolution of the Joint Stars synthetic aperture radar (SAR) imagery. Programming performed on DEC VMS systems and Joint Stars RASP parallel processing DSP platform (Mercury Raceway) using FORTRAN and C.
Computer Replacement Program
Developed system software and built-in-test (BIT) test software for the Joint Stars Computer Replacement Program's Ruggedized Advanced Signal Processor (RASP). The RASP is the primary digital signal processing (DSP) component of the J-Stars radar system. Most software developed for an embedded UNIX processor (SPARC) in a multiprocessor environment running on a VME/Raceway bus. Components programmed included the 1553B communications interface, a FDDI LAN interface, a GPS time source interface, a VME I/O card, Mercury Sharc processor cards, Mercury Power PC processor cards, and the Mercury Raceway Operating System.
Ported a real-time operating system (pSOS kernel) and proprietary communications software to a new platform. This Motorola 68040, VME based platform is for a satellite digital communications system. Code is in assembly and 'C'. Development carried out in a UNIX environment using Sun workstations. Trained in VxWorks real-time operating system for future development projects.
Communication Systems Division / Meter Communication Systems Division
Continued participation in Protocol Design Working Group to develop a new RF protocol and system design with the Schlumberger/Motorola joint venture group AMRT. Expanded leadership position in development of communications code to be used on multiple platforms [6808, MOSCAD (68302), MS-DOS, Windows].
Communication Systems Division / Meter Communication Systems Division
Major accomplishments included:
Information Systems Division
Led the product development of a new commercial battery powered remote data recorder and system to support it. Tasks included:
Other contributions included:
Tasks and accomplishments included:
Part time teaching. Courses included:
Headed development of a card access security system based upon MS-DOS PC central computers with distributed, microcomputer-based controllers. Most programming was for an interrupt driven real-time response environment using assembly language for the 80C31. FORTRAN, dBase III+, 'C', and assembly language used for the 80286. Responsibilities and accomplishments included:
Responsibilities and accomplishments included: